In the process of manufacturing semiconductor integrated circuits, a wafer is subjected to various processes, such as film-formation, etching, oxidation, and diffusion. Owing to the demands of increased miniaturization and integration of semiconductor integrated circuits, the throughput and yield involving these processes need to be increased. In light of this, there is a semiconductor processing system of the so-called cluster tool type, which has a plurality of process chambers for performing the same process, or a plurality of process chambers for performing different processes, connected to a common transfer chamber. With a system of this type, various steps can be performed in series, without exposing a wafer to air. For example, Jpn. Pat. Appln. KOKAI Publication Nos. 3-19252, 2000-208589 and 2000-299367 disclose a semiconductor processing system of the cluster tool type. The assignee of the present invention also filed Jpn. Pat. Appln. No. 2001-060968 disclosing an improved semi-conductor processing system of the cluster tool type.
FIG. 11 is a schematic view showing the structure of a conventional processing system of the cluster tool type. As shown in FIG. 11, the processing system 2 includes three processing apparatuses 4A, 4B, and 4C, a first transfer chamber 6, two load-lock chambers 8A and 8B provided with a pre-heating mechanism or cooling mechanism, a second transfer chamber 10, and two cassette chambers 12A and 12B. The three processing apparatuses 4A to 4C are connected to the first transfer chamber 6 in common. The two load-lock chambers 8A and 8B are disposed in parallel with each other between the first and second transfer chambers 6 and 10. The two cassette chambers 12A and 12B are connected to the second transfer chamber 10. A gate valve G to be opened/closed is airtightly interposed between each two of the chambers.
The first and second transfer chambers 6 and 10 are respectively provided with first and second transfer arm devices 14 and 16 disposed therein, each of which is formed of an articulated structure that can extend, contract, and rotate. Each of the arm devices 14 and 16 is arranged to hold a semiconductor wafer W to transfer it. The second transfer chamber 10 is provided with an alignment mechanism 22 disposed therein, which is formed of a rotary table 18 and an optical sensor 20. The alignment mechanism 22 is arranged to rotate a wafer W transferred from the cassette chamber 12A or 12B, and detect its orientation flat or notch to perform alignment thereon.
When a semiconductor wafer W is processed, an unprocessed semiconductor wafer W is first taken out of a cassette C placed in one of the cassette chambers, e.g., a cassette chamber 12A, by the second transfer arm device 16 disposed in the second transfer chamber 10, which has been kept at atmospheric pressure with an N2 atmosphere. Then, the wafer W is transferred by the arm device 16 and placed on the rotary table 18 of the alignment mechanism 22 disposed in the second transfer chamber 10. The arm device 16 is kept stationary on standby while the rotary table 18 rotates to perform alignment. The time period necessary for this alignment operation is, e.g., about 10 to 20 seconds.
After the alignment operation, the aligned wafer W is held again by the arm device 16, which has been waiting, and transferred into one of the load-lock chambers, e.g., the chamber 8A. The wafer is pre-heated in the load-lock chamber 8A, as needed, and, at the same time, the interior of the load-lock chamber 8A is vacuum-exhausted to a predetermined pressure. The time period necessary for performing this pre-heating or vacuum-exhaust is, e.g., about 30 to 40 seconds.
After the pre-heating operation, the gate valve G between the load-lock chamber 8A and the first transfer chamber 6, which is set at vacuum in advance, is opened to make them communicate with each other. Then, the pre-heated wafer W is held by the first transfer arm device 14 and transferred into a predetermined processing apparatus, e.g., 4A. Then, a predetermined process, such as a film-formation process of a metal film, insulating film, or the like, is performed in the processing apparatus 4A. The time period necessary for performing this process is, e.g., about 60 to 90 seconds.
The processed semiconductor wafer W is transferred, through a route reverse to the route described above, to, e.g., the original cassette C placed in the cassette chamber 12A. In this route to return the processed wafer W, the other load-lock chamber 8B is used, for example, and the wafer W is transferred after it is cooled to a predetermined temperature. The time period necessary for performing this cooling and returning to atmospheric pressure is about 30 to 40 seconds. Before the processed wafer W is transferred into the cassette C, alignment may be performed by the alignment mechanism 22, as needed.
As semiconductor wafer processes progress in level of miniaturization and integration, decrease in film thickness, and increase in the number of layers, integrated circuits are increasingly required to have diversified functions. As a result, manufacture of semiconductor integrated circuits tends to shift from small item large volume production to large item small volume production. This makes it necessary to provide one semiconductor processing system with a plurality of processing apparatuses using different process conditions.
For example, the semiconductor vacuum process includes a process performed in a relatively high vacuum state, such as a process using plasma, and a process performed in a state whose vacuum level is not so high, such as a pre-cleaning process for deoxidizing an oxide film on a semiconductor wafer surface. If processing apparatuses for performing processes under vacuum but at different process pressures, as described above, are connected to the common transfer chamber 6, as shown in FIG. 11, a problem arises such that it takes time to adjust pressure in the chambers when a wafer is transferred between the common transfer chamber 6 and the processing apparatuses using different process pressures.